The present invention relates to segmented mixed signal circuitry for performing a series of switching operations, and to switching circuitry for use therein. The present invention has particular application in high speed digital to analog converters (DACs).
In known DACs, a plurality of analog circuits, or segments, are provided, each of which comprises a current source and a differential switching circuit. Each differential switching circuit comprises a first switch connected between the current source and a first output terminal, and a second switch connected between the current source and a second output terminal. At any one time, one of the switches is on, and the other switch is off, in order to switch the current from the current source to one of the two output terminals. Drive circuitry is also provided in order to supply drive signals for driving the various switches in dependence on an input digital data signal. The analog output signal is the voltage difference between a voltage produced by sinking the current at one output terminal into a resistance of value R, and the voltage produced by sinking the current at the other output terminal into another resistance of the same value R.
In the known DAC, it is important that the timings of the signals applied to the first and second switches in each segment are carefully controlled with respect to each other. For example, when the differential switching circuit changes state, it is usually necessary for the switch which is off to start turning on before the switch which is on starts turning off.
This requires one of the drive signals to be slightly in advance of the other drive signal and/or to change state faster than the other drive signal. Such control of the drive signals is referred to as shaping of the signals. If the signals are not correctly shaped, glitches may occur in the output signal, which may cause distortion in the analog output signal.
United Kingdom patent publication number GB 2333191 in the name of Fujitsu Limited, the entire subject matter of which is incorporated herein by reference, discloses a DAC having a plurality of analog segments, in which the shaping of the drive signals within each segment is carried out by circuitry provided locally in each segment. This arrangement serves to ensure that, within each segment, the switches change state at the correct times with respect to each other.
A problem which has been identified in known DACs is that random variations may occur from one segment to another in the times at which the various switches change state. These timing mis-matches may lead to distortion in the output signal of the DAC. Such mis-matches may be due at least in part to random variations in the characteristics of circuitry within each segment. For example, shaping circuitry which is present within each segment may itself lead to mis-matches in the switching times of different segments, due to random variations in the characteristics of transistors in the shaping circuitry.